1. Field of the Invention
This application claims priority to Taiwan Application No. 93128389, filed on Sep. 20, 2004.
This invention relates to a semiconductor chip, chip package and package process, and particularity to ones with high performance.
2. Description of the Related Art
As the tremendous development of IT (Information Technology) proceeds, it's always been a piece of cake for retrieving information far away from us. Also, with the aid of high-efficiency IT product, enterprise competitor would be of benefit taking the lead in the game of time. IT product constantly renews itself and integrates various circuit designs, resulting in bearing much more function in just one chip. Moreover, plus the advanced technology of semiconductor, the success of mass production for IC copper process and the integrating of circuits, most signal transmission can be done in the same chip. Therefore, reduction of signal transmitting path will bring the high effiency of chip.
After completing the desired chip, it is then sequentially bonded with the substrate by wirebonded conducting wire or bumps. The wirebonded conducting wire has a small cross-sectional area vertical to the direction of signal transmission which causes unexpected large nosie, and worse, computation errors. However, using bumps as transmission media can largely increase the said cross-sectional area, which is why the latter is more preferable. In fact, according to the modem technology we have nowadays, it is only acceptable for binding chip and substrate or binding two chips by small-sized bumps. As a result, high efficency of signal transmission is still a long way to go.